Computer Architecture: A Quantitative Approach

Table of Contents

  • Ch-1. Fundamentals of Quantitative Design and Analysis
  • Ch-2. Memory Hierarchy Design
  • Ch-3. Instruction-Level Parallelism and Its Exploitation
  • Ch-4. Data-Level Parallelism in Vector, SIMD, and GPU Architectures
  • Ch-5. Multiprocessors and Thread-Level Parallelism
  • Ch-6. The Warehouse-Scale Computer
  • Ch-7. Domain Specific Architectures
  • A. Instruction Set Principles
  • B. Review of Memory Hierarchy
  • C. Pipelining: Basic and Intermediate Concepts
  • D. Storage Systems
  • E. Embedded Systems
  • F. Interconnection Networks
  • G. Vector Processors
  • H. Hardware and Software for VLIW and EPIC
  • I. Large-Scale Multiprocessors and Scientific Applications
  • J. Computer Arithmetic
  • K. Survey of Instruction Set Architectures
  • L. Advanced Concepts on Address Translation
  • M. Historical Perspectives and References


Notes Mentioning This Note

Table of Contents

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